The present invention generally relates to analog-to-digital converters (ADC), and particularly to the variety termed flash converters, for digital systems requiring high speed, high accuracy and high resolution conversion of an analog voltage or current into a corresponding digital output code.
Two parts can be distinguished in every flash ADC: an analog and digital sections. The analog section of the conventional N-bit flash ADCs consists of a reference source, K comparators connected in parallel and a chain of K (mostly K+1) equally valued resistors providing reference voltages thereto, whereby K=2.sup.N -1. The digital section consists of an encoder for sampling comparator output signals, correcting faulty codes and providing binary output code. All ADCs are clocked.
The flash ADCs offer the fastest possible conversion as the quantization level of the input voltage is determined in a straightforward structure, particularly no feedback manipulating the input signal is used. They do suffer however from many problems, mostly originating from a very high circuit complexity. For instance, a 10-bit flash ADC demands 1023 comparators and number of switching elements comparable to a modern 16-bit microprocessor. A 16-bit ADC according to ordinary constructions is virtually impossible, requiring 65535 comparators not to mention other necessary components. Furthermore, the resistor network causes deficient long term and temperature stability, reduced speed and accuracy, enlarged chip space and increased power consumption, etc.
The huge number of the comparators in high resolution flash ADCs results in a very complex gate structure of the encoders. Certain kinds of errors caused by a false response of the comparators are not possible to correct due to technological limitations. Simplified error correction schemes result in missing codes. For instance, the flash ADCs have a tendency to miss a code every few billion conversions, i.e. several times a minute when ADC is sampling at 100 MHz.
An input track-and-hold amplifier (THA) is mandatory for optimizing speed and accuracy. Furthermore, an amplifier must be able to drive a large and varying input capacitance of the ADC.